Interrupt in 8051
It is a special condition that arises while the microcontroller is executing the main program. Then the microcontroller stops where it is executing in the program and goes to the Interrupt service routine ( ISR is the code ) , the microcontroller executes the ISR and continues the main program. This is similar to call branching. The called function is known as Subroutine in the case of call branching, Here it is Interrupt service routine( ISR ). In the call branching, to return to the main program RET command is given at the end of the subroutine, here RETI is
the command to return to the main program after completing the interrupt service routine.
Eg: Playing a game in mobile phone ( Processor is running main program i.e. game )
A call comes, then the processor stops, the main program and goes to ISR ( here
ISR is call )
Whenever an interrupt occurs, some flag bit becomes 1, so that the processor can identify that the interrupt is pending. There are cases when multiple interrupts occurs simultaneously , then a priority order is followed, So the interrupts that aren’t solved has their particular flag bit as 1, such interrupts are known as pending interrupts.
Types of interrupts in 8051:
There are 5 types of interrupts in 8051.
INT0, INT1 ( INT0 bar and INT1 bar ) :
These are the physical interrupts given to these 2 pins by external devices.
T0 and T1:
As studied in the timer section of 8051, once timer completes it’s job it sends an interrupt to the processor. T0 is the interrupt sent by timer 0 and T1 is the interrupt sent by timer 1.
Serial Port interrupt:
As seen in the serial port theory of 8051, Whenever 8051 is transmitted it sends data to SBUF and from there it is transmitted, now whenever SBUF is empty it sends an interrupt to the processor . Similarly while receiving first data is received in SBUF, and then interrupt is sent to 8051. These two are interrupts that are part of serial port interrupt.
Column- 3 ( flag ) depicts the flag bit which would become one. ISR is the interrupt address, where the processor would go to complete the interrupt. Interrupts whose ISR is fixed, such interrupts are known as vectored interrupts.
In 8051 there are 5 interrupts with 6 conditions ( Transmission and reception in ES )
Whenever an interrupt occurs, the respective flag becomes 1, and to solve the interrupt while the processor goes to ISR , the flag is auto cleared.
All the flag are auto cleared except ES flag, because in this case interrupt is not decided ( whether occurred due to transmission or reception )
Interrupt enable ( IE ):
This is one among 21 SFRs of 8051.
If EA=0, all interrupts are disabled until EA = 1.
While going to ISR all interrupts are disabled and while returning all interrupts are restored, this is the reason why there is special return command for interrupts i.e. RETI .
ET2 was reserved for 3rd timers that were made in further microcontrollers.
Interrupt Priority ( IP ):
By default the priority order of five interrupts are:
If the user wanted to change to the priority order, then the IP flag register is useful.
There are only two ways of assigning priority ( 1 or 0 ). In this way if two interrupts has priority as 1, then for both of them above order would be followed.
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