Minimum mode of 8086
8086 microprocessor can be operated in two modes, the one is minimum mode of 8086, and other is maximum mode.
- Minimum mode of 8086
- Maximum mode of 8086
Minimum mode:
In this mode, 8086 is the only processor for processing the data, thus known as the minimum mode of 8086.
Maximum mode:
In this mode of 8086 microprocessor, it interfaces with other processors such as 8087 and other processors to boost up the processing.
Concept of multiplexing:
In any processor, there are three types of buses. In which address bus and data bus are never used at a single time. So instead of using separate lines for address and separate for data buses, both are multiplexed , by which the size is decreased drastically.
There are 20 address lines( A0 – A19 ) and 16 data lines(D0 – D15). The first 16 address lines ( A0 – A15 ) are multiplexed.
There are few other pins on the 8086 chip, ( S3 – S6 ). These four pins are multiplexed with A16 – A19 pins of 8086.
In memory segments, segments are selected by the programmer, on which the operations are performed. The segment is selected with the help of S3 and S4 pins.
| S4 | S3 | Segment |
| 0 | 0 | ES |
| 0 | 1 | SS |
| 1 | 0 | CS |
| 1 | 1 | DS |
S5 pin is used to show status of IF ( flag register ). If
S5 = 0 ; IF = 0
S5 = 1 ; IF =1
If
Bus master:
In 8086, bus mastering is a feature that enables a device connected to the bus to initiate direct memory access transactions.
S6 = 0 ; 8086 is the bus master
S6 = 1 ; Other processor is bus master, in max mode of 8086, other processor can be bus master
In this way A0 – A19 pins are multiplexed with D0 – D15 and S3 – S6 are multiplexed respectively. There is one more pin BHE bar ( refer memory banking ) which is multiplexed with S7 pin which is reserved for future purposes by 8086 in 20th century.
So on physical 21 pins there are actually 2 sets of 21 ( total 42 pins ). ALE ( it is another pin on 8086 pin ) which stands for Address latch enable, If
ALE = 0 ; non address lines are selected
ALE = 1 ; address lines are selected
| If ALE = 0, below pins are active | If ALE = 1, below pins are active |
| D0 – D15 | A0 – A15 |
| S3 – S6 | A16 – A19 |
| S7 | BHE bar |
Minimum mode configuration of 8086
In minimum mode configuration of 8086, it is attached to other chips ( these chips are not processors ).
8282 and 8286:
Address and data lines are multiplexed but, in real both the quantities should be separated from each other. So there are two other chips that should be integrated with 8086 to separate address and data.
8282:
If ALE = 1 , multiplexed pins act as address lines, which means the address is coming through those 20 lines ( ALE signal is also fed to 8282 IC ). If ALE = 1, then 8282 IC allows the value through multiplexed lines and then stores the value in it ( 8282 is a latch, it can capture the value ) Similarly BHE bar pin is also accessed in the same way. Few pins in 8282
STB : This stands for stobe and this pin is equivalent to ALE, whenever STB = 1, then only address is allowed inside the 8282 from 8086 or else it blocks the line.
OE bar : This is active low signal and stands for output enable.
Whenever ALE = 1, those lines carry address, which is carried to both the ICs 8282 as well as 8286. But 8286 is purely designed to accept data only.
8286:
8286 is a 8 bit data transceiver , as seen in the previous paragraph, whenever ALE = 1, address is also entering the 8286 , to solve this issue, 8286 should be logically disconnected ( however physical disconnection is not possible ) . This is done by an OE bar signal. This OE bar pin of 8286 is connected to the DEN bar ( data enable which is an active low signal ).
DEN low signal decides whether signal from multiplexed bus should enter the 8286 transceiver or not. Once ALE = 0 , DEN bar = 0 , OE bar = 0, which means 8286 will allow the data from multiplexed bus. As 8286 is a bidirectional device , it should be specified whether data is Transmitted or received, which is done by T pin of 8286.
DT/R ( R is active low ) = 1 ( transmit the data T = 1 )
DT/R = 0 ( receive the data T = 0 )
74138:
This is a 3:8 decoder , It’s inputs are
M/IO ( IO is active low )
RD ( it is active low )
wR ( it is active low )
Any processor has two important parameters ( memory and input/output devices ), these both parameters are integrated using this IC.
| M/IO ( IO is active low ) | RD( active low ) | WR ( active low ) | Output | Status |
| 0 | 0 | 0 | Y0 | |
| 0 | 0 | 1 | Y1 | IO Read |
| 0 | 1 | 0 | Y2 | IO write |
| 0 | 1 | 1 | Y3 | |
| 1 | 0 | 0 | Y4 | |
| 1 | 0 | 1 | Y5 | Memory Read |
| 1 | 1 | 0 | Y6 | Memory Write |
| 1 | 1 | 1 | Y7 |
Oscillator in minimum mode configuration of 8086:
8086 is powered with a 18Mhz crystal oscillator, even though its frequency is 6MHz, because 8086 has a requirement of 6MHz clock frequency with 33% of duty cycle ( why ? , it would be cleared in 8086 timing diagram in minimum mode )
Here
NMI , INTA , INTR are related to interrupts ( read interrupt of 8086 )
HOLD and HLDA , by using these pins DMA can be enabled ( DMA stands for direct memory access ) , in which 8086 loses the bus control feature
If HOLD = 1, DMA would get control over bus, DMA saying 8086 to hold the operations. And then DMA will start transferring data between memory and IO. After the procedure control is given back to 8086.
Now let us see complete minimum mode of 8086 block diagram
Minimum mode of 8086 timing diagram:
Timing diagram when 8086 is on minimum mode. There are four stages in 8086 microprocessor. This timing diagram is of read and write signal.
- Microprocessor gives address
- Microprocessor gives read/write data
- 8086 microprocessor waits for the data to get while reading.
- Microprocessor stores the data.
In the 3rd step the delay is known as propagation delay. This delay is only in read signal not in write signal.
