ARM Operating Modes
The ARM processor has seven different modes of operation. Each of the ARM operating modes has a specific purpose, and only one mode is active at any one moment.
Table 1 shows the 7 important ARM operating modes, which define the registers that may be used (also known as the register map) and the operating privilege level.Except for User mode, the ARM processor has a straightforward privilege model: all modes are privileged. Privilege gives you the power to accomplish things that you can’t do in User mode. Changing the operating mode, for example, is a privileged activity. Only privileged modes in a system with memory management have access to particular parts of the address space, such as the operating system’s memory or I/O devices. User applications are then executed in User mode, which has no such permissions. This implies that such processes cannot directly interfere with hardware, which is beneficial when executing untrustworthy programmes. Furthermore, because User mode is unable to modify the operating mode, user duties are bound by these constraints. Memory management systems are rarely required in an embedded setting, hence this experiment will focus solely on the User, FIQ, IRQ, and Supervisor modes of operation. There are a total of 37 registers in the ARM processor: 31 general-purpose registers (including the Program Counter R15) and 6 status registers.These registers are shown in Figure 1:
As you can see from Figure 1, each processor mode has its own R13 and R14 registers. To read more about ARM registers , click here. The explanation of each of the Operating modes in ARM are listed below.
SVR Operating Mode in ARM
In this Operating modes in ARM, On reset, the ARM7 enters this mode. Its purpose is to run the BIOS software (Booting program). SWI can also be used by the programmer to activate this mode (Software Interrupt). For example, there are two distinct privileges on our phone or computer. The supervisor mode is one, while the user mode is the other. These two modes are separated by the amount of protection they provide. When you’re in supervisor mode, you have access to both system and user data. When in user mode, however, you can only access user data. Because of the system’s security level, you do not have authorization to view the data.
User Mode in ARM
This is the default mode, which runs all user programmes. It’s the only mode that isn’t privileged. Memory, I/O components, and flags are all restricted. All of the other modes can be accessed via a variety of exceptions (interrupts). After leaving supervisor mode, the microcontroller enters user mode and remains there until you turn it off. Remember This does not go straight to user mode when you start it. It is first handled by the supervisor mode, after which the supervisor mode switches to user mode. The ARM processor spends more than 95% of its time in user mode over its lifespan. You may access all other modes from this mode.
System Mode in ARM
In this Operating modes in ARM, Its a privileged version of user mode. This mode may be used by the User application to get complete control over CPSR and Memory. Needless to say, the programmer should utilise this mode with extreme caution, otherwise the entire protective mechanism may be jeopardised.
When you make a system call, you automatically enter system mode. For example, on our phone, if we wish to modify certain settings or adjust the brightness of our phone. We know that all we have to do is move the cursor left and right. However, it then sends a system call to alter the brightness of your phone before returning to normal user mode.
FRQ Operating Mode in ARM
In this Operating modes in ARM, Fast Interrupt Request ModeWhen a high priority interrupt is received through the nFIQ pin, this mode is activated. Because this mode is used for high-priority interruptions, the ISR should run as quickly as possible (delay). Normally, when we start an ISR, the original values of all GPRs in the parent programme must be preserved, and these values must be restored into the GPRS before the ISR is completed so that the main programme may continue properly. This consumes a lot of time, which causes Interrupt Latency to rise. A fresh copy of R8-R14 is utilised when a fast Interrupt request is sent. This eliminates the need to save and restore these registers, making the ISR significantly quicker to perform. As a result, it’s known as Fast Interrupt Mode.
Abort Mode in ARM
In this Operating modes in ARM , When an attempt to access a memory location fails, this mode is activated. Specific areas are inaccessible in some settings due to the protection system. When an attempt is made to access one of these locations, the CPU enters Abort mode, and the programme that attempted to access it is terminated. When we go from user to supervisor mode and try to access system data or a system application that the user does not have the authorization to access, it goes into abort mode, kills the operation, and returns to user mode.
Undefined Operating Mode in ARM
Undefined instructions are entered in this mode. When a co-processor instruction is encountered but no co-processor is available in the system, this happens. The CPU then enters Undefined mode, terminating the programme that was attempting that instruction.
For detailed information – Click Here
Related Articles:
Registers in ARM
ARM Core DataFlow Model