Data transfer group instructions

Data transfer group of instructions, this is another part of the instruction set. As the name suggests these are the instructions for data transfer.

MOV A, #data

Data is moved to A register

Eg: MOV A,#16H

A ← 16H

MOV A, address

Data is moved to A register from the specified address ( data is not removed from address )

Eg: MOV A, 16H

A ← [ 16H ]

MOV A, Rr

Data is moved to A register from another RAM register.

Eg: MOV A, R0

A ← R0

MOV A, @RP

Data is moved to A register from the data of location, stored in RP register.

Eg: MOV A, R0

A ← [ R0 ]

MOV address1, address2

Data is moved to address 1 from address 2

Eg: MOV 12H , 34H

[ 12H ] ← [ 34H ]

The above operations are performed only in internal RAM.

External RAM Instructions:

For external RAM operations there are different data transfer group .

MOVX A, @DPTR

Data is moved to A register from the data of location, stored in DPTR register. The address must be stored in DPTR, because external RAM has a 16-bit address bus and only the DPTR register can hold 16-bit.

A ← [ DPTR ]’ stands for external RAM operation.

MOVX @DPTR, A

[ DPTR ]’ ←  A stands for external RAM operation.

MOVX A, @R0

External RAM has 16-bit address lines, but upto FF addresses there are 8-bit lines address only, so whenever MOVX instruction is used with an 8-bit register ( here R0 ), it depicts first FF addresses of external RAM.

A ← [ R0 ]’ stands for external RAM operation.

MOVX @R0, A

[ R0 ]’ ←  A

ROM Instructions:

Even data transfer instructions for ROM too changes.

MOVC A, @A+DPTR

Refer addressing modes of 8051.

A ← [ A + DPTR ]’

MOVC  @A+DPTR, A

Refer addressing modes of 8051.

[ A + DPTR ]’ ← A 

Stack related instructions:

Push 12H

This instruction works only with direct addressing mode. Here 12H is the address from where data should be pushed on the top of the stack.

First increment SP ( stack pointer ), so that data doesn’t get overwritten.

Then push the data.

SP ← SP + 1

[ SP ] ← [ 12H ]

Pop 13H :

This instruction means pop the topmost data and store that in the defined address.

First the SP is decremented then it is popped.

[ 13H ] ← [ SP ]

SP ← SP – 1

Exchange instructions:

XCH A, Rr:

Exchange the contents of A register and Rr register

A  ↔ Rr

XCH A, address:

Exchange the contents of A register and specified address.

XCH A, 13H

A  ↔ [ 13H ]

XCH A, @R0:

Exchange the contents of A register and contents of R0 register.

XCH A, R0

A  ↔ [ R0 ]

XCHD A, @R0:

Exchange the only lower nibble of A register and contents of R0 register.

XCHD A, R0

ALower nibble  ↔ [ R0 ]Lower nibble

Read related topics:
Addressing modes of 8051

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