Operating Modes of 8255
Refer Architecture of 8255 PPI, before proceeding to this article. As discussed there are 3 modes of data transfer in 8255 PPI. In this article, operating modes of 8255 PPI is explained.
Operating Mode 0 [ Simple Mode ]
- It is a normal mode of data transfer.
- All 3 ports are available for data transfer.
Port A, B will be used as 2 8-bit ports and Port C is used as 2 4-bit ports.
- It is less reliable because of no handshaking.
- Here slower devices cannot be interfaced easily.
Mode 1 [ Input Handshaking ]
Mode 1 is unidirectional handshaking, which means either handshaking can be done for input devices or output devices only. In traditional CPUs, there were separate ports only for keyboard, mouse….. Which means the keyboard port could be only used for keyboard only. In present day computers, USB ( universal serial bus ) is used, which is bidirectional handshaking. Here there are 4 signal pins, but in architecture we have seen RD pin is already attached to the control pin. So we need 3 pins from Port C for handshaking. This was second operating modes of 8255 PPI.
- Input device gives STB signal ( active low ) to 8255 before sending data. If 8255 already has some data, then it doesn’t allow the Input device to send data.
- 8255 accepts data and stores it in the input buffer register. As soon as it receives the data, it gives an IBF signal ( input buffer is full ) . If IBF = 1, it does not allow any other data to enter 8255 PPI.
- Now 8255 has data that should be sent to 8086. It makes INTR high, which means it is interrupting the processor.
- Whenever the processor is free, it services this INTR. Then the Processor sends an RD ( active low ) signal and makes data transfer via data bus.
- As soon as the RD signal is given , INTR gets low.
Complete stepwise handshaking :
- STB ( active low ) goes low.
- IBF goes high.
- INTR goes high.
- RD ( active low ) goes low.
- INTR goes low.
- RD ( active low ) goes high.
- IBF goes low.
Timing Diagram of Input handshaking:
Mode – 1 [ Output Handshaking ]
In this type, 8255 will be accepting data from 8086 processor. It is vice versa to input handshaking. Here there are 4 signal pins, but in architecture we have seen WR pin is already attached to the control pin. So we need 3 pins from Port C for handshaking.
- 8255 sends an interrupt whenever it is ready to accept data from the processor.
- Whenever 8086 needs to send a signal ( condition provided INTR is active ) , then 8086 sends WR ( active low ) signal. If 8255 has already some data in it, then INTR will be low, and 8086 will not be able to send data to 8255 PPI.
- As 8255 receives data it resets OBF ( output buffer is full ( it is active low signal ) ) .
- Then the Output device acknowledges the received input.
Complete stepwise handshaking
- WR signal is activated.
- INTR is set to low. [ now 8086 cannot send data again ]
- OBF goes low [ Output buffer is full ]
- ACK goes low ( it is active low signal )
- OBF goes back to high
- ACK goes back to high
- Data transfer is successful, so INTR goes back to high.
Timing Diagram of Output handshaking:
Mode 2 [ Bidirectional Handshaking ]
In this mode, two way handshaking can be done. For normal input handshaking we require 3 pins for handshaking, similarly 3 pins for output handshaking. For bidirectional handshaking we need 5 pins ( because one INTR is enough )
If PA is in mode 2, which means it is utilizing ⅝ pins of port C for handshaking. So there are 3 remaining pins of port C, so definitely port B cannot be operated in mode-2, but while port-A is in mode-2, port-B can be operated in Mode – 0 or mode – 1.
|Mode 0||SImple||Works as port||Works as port||Works as port||Works as port|
|Mode 1||Handshaking||Works as port||Works as port||Used for handshaking in PB||Used for handshaking in PA|
|Mode 2||BidirectionalHandshaking||Works as port in Mode||Works in mode – 0 or mode – 1||Used for handshaking in PB||Used for handshaking in PA|
These were the three operating modes of 8255 PPI. Also read
Architecture of 8255 PPI