Memory organization of 8051

Memory organization of 8051 microcontroller is based upon internal RAM of 8051. There are four types of memories in 8051.

  • Internal RAM
  • External RAM
  • Internal ROM
  • External ROM


ROM is also known as program memory or code memory. 8051 can hold total ROM ( internal + external ), because there are 16-bit address bus, which could hold

216 = 26 x 210  = 64K bytes

There are three cases 

  • 4KB of internal ROM only.
  • 4KB internal ROM and 60KB of external ROM.
  • 64KB of external ROM only.
4KB internal ROM:
Memory organization of 8051
Internal ROM of 8051

Make sure EA =1 , or else if EA= 0, then internal ROM would be excarded, and as there is no external ROM, operation wouldn’t happen. Refer 8051 architecture to know more about EA .

4KB internal ROM and 60KB of external ROM:
Memory organization of 8051
Internal ROM with extended external ROM

Here when the operation is performed from address location 0000 to 0FFF , then we must give the value of  EA, so that 8051 can decide where the operation should be performed ( whether in internal ROM or external ROM ) , in this case make  EA=1. If the operation is performed in the address range 1000 to FFFF, then there is no need of  EA, however that location exists in external ROM only. 

64K bytes external ROM only:
Memory organization of 8051
Completely external ROM

In this case we have to make  EA= , to discard the internal ROM.


RAM is also considered as data memory. Unlike ROM , RAM can hold 64KB+ ( 64KB external RAM + 128bytes internal RAM ). Internal RAM and external RAM can co-exist. Internal RAM requires 8-bit data address bus and external RAM requires 16-bit address bus, so there is nothing to do internal RAM with external RAM. 

Memory organization of 8051

Structure of internal RAM:

Memory organization in internal RAM of 8051 is ( it has 3 parts )

  • 32 General purpose registers.
  • Bit addressable memory.
  • Ordinary memory.
Memory organization in 8051
Internal RAM( part-2 ) organization ( Memory organization in 8051 )

32 Bit general purpose registers:

As already explained in the previous tutorial, 32 registers are divided into 4 banks, each bank containing 8 registers.

Each register can be accessed by 2 ways.

Either by calling the register name ( R0 ) and then by activating one of the banks ( by default bank 0 is activated )

Or else any register can be accessed by address of it , Their address range starts from 00 and goes upto 1F.

Bit addressable :

There are 16 bytes in this part, and each byte consists of 8 bits, so totally 128 bits in this section and each bit can be used by the programmer ( bit addressable ) . As there are 128 bits their address range starts from 00 and goes upto 7F. 

Is it fair to give the same address to 128 bytes of RAM and 128 bits of 2nd part of RAM?

Yes, it can be. As there are 111 operations that could be done  in 8051, out of which 99 are byte operations and 8051 has a program in it to identify whether the operation is bit operation or byte operation.

Eg: ADD A, 1F ( obviously addition is a byte operation ) , so here 1F is byte address

      SETB   1F ( setting to HIGH (1) is a bit of an operation ).

Is this section used only for bit operations ??

No, this section also has 16 byte addresses ( 20 to 30 ), so it is also capable of performing byte operations. 

Ordinary memory:

80 bytes of internal RAM is given to ordinary memory, which is neither register nor bit addressable. This was Memory organization in 8051 and stack part is below.


Stack is used to store data. It follows the principle of first in last out. ( read more about stack )

Push = entering the data into stack

Pop = removing the data from stack

Stack pointer in a stack

There is only one opening of such a structure. 

Eg: SMS in mobile ( latest messages comes on top )

Social media feed.

SP stands for stack pointer , this stores the address of the top of the stack. SP is a 8-bit register. It is one among 21 SFRs. There is also a stack in the internal RAM.

Before we add data into stack , we have to increment SP, or else we would overwrite on the existing data at SP address.

After POP operation, we have to decrement the value of SP. At the 07 location of internal RAM SP is located inbuilt. Programmers can change its location. 

Reason for SP located at 07:

  • Stack should be able to hold a maximum amount of data.
  • If it starts from 00 , it would cover bank-0 , which is an active bank and which contains 8 general purpose registers.
  • It also wastes bit addressable part and ordinary memory, but these two are rarely used.And whenever programmer need this memory , SP can be changed. This was all about Memory organization in 8051.

Related topics

Memory segmentation in 8086
Memory banking in 8086

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