Timers of 8051

There are two timers in 8051, both are 16 bit timers . These are up counters. They can count from 0000 to FFFF ( 0 to 65,535 ). However, in each timer, one register is not enough to store 16bits, so both the timers have a total 4 SFRs, each SFR to store 8 bits. To trigger these timers they require a clock ( either external or internal depends on many parameters ).

TH1 stands for timer 1 higher byte , TL1 stands from timer 1 lower byte.

TH0 stands for timer 0 higher byte , TL0 stands from timer 0 lower byte.

For eg: 0090H count is given to Timer 0. Then 00 is stored in TH0 ( higher byte in TH0 SFR ), and 90 is stored in TL0 ( lower byte in TL0 SFR ).Once the timer has started it goes up 0091H to all the way upto FFFF. Once reached FFFF, then rolls back to 0000. This event is known as timer overflow. Whenever the timer completes it sends an interrupt to the processor by making some flag as 1, and once processors detect the interrupt, it uses call methodology ( branch operation ) to go to that address and that flag gets reset. If the flag is not set to 0, it would cause a loop again. Whenever that flag becomes one processor gets interrupted, so it is important to reset the flag after the processor goes to ISR( interrupt service routine( in detail about interrupts would be in upcoming tutorials ) ).

As it is an up counter we cannot directly give the count. For example we need interrupt after 9 counts then

Count = FFFF-0009+0001

+1 because after reaching FFFF it counts one more for overflow condition, when overflow condition occurs then interrupt is sent.

Timers and Counters in 8051 :

Counter : In this process count is the concern.

Eg: Standing near a road and counting 100 cars passed in what time. Here we focus on counting the cars.

Timer : In this process timing is the concern.

Eg: Stand near a road and count the number of cars passed in 30min. Here time is our concern.

In other words, timers have the same frequency throughout its life, whereas the counter’s frequency isn’t the same. It also depends on the user usage whether it is a timer or counter.

Tcon ( Timer control ):

This is one among 21 SFRs and important SFR for timers in 8051. It is also bit addressable( each of 8 bits can be controlled individually ) . Out of 8 bits of Tcon , 4 bits are for timer and the other 4 bits are for INT0 and INT1 related purposes.

Tcon register

TF1:

Timer overflow flag for timer 1. Whenever a timer overflow event occurs in timer 1, this flag becomes 1 and then interrupt is sent to the processor and as the processor goes to ISR this flag becomes zero.

TF0:

Timer overflow flag for timer 0. Whenever a timer overflow event occurs in timer 0, this flag becomes 1 and sends an interrupt to the processor and as the processor goes to ISR this flag becomes zero.

TR1:

Timer run for timer 1. Whenever the TR1 flag is 1, it means enabling the timer 1 ( enabling timer / counter depends on another flag of another SFR ).

TR0:

Timer run for timer 0. Whenever the TR0 flag is 1, it means enabling the timer 0 ( enabling timer / counter depends on another flag of another SFR ).

Here TR0 and TR1 can be controlled by the programmer, so this is software control of the hardware delay.

IE0:

This stands for interrupt external for INT0. whenever this flag is HIGH, it means an interrupt occurs at INT0.

IE1:

This stands for interrupt external for INT1. whenever this flag is HIGH, it means an interrupt occurs at INT1.

IT1:

IT1 stands for interrupt type for INT1. There are two types of triggering

Edge triggering
Level triggering

Edge triggering: Action of going from low to high.
Eg: firing a bullet, it only fires while we press , but not on keeping it pressed.

Level triggering: Action of being at high level.
Eg: Accelerator of the car, car not only accelerates when pressing it, but keeping it pressed.

If IT1 = 0, then it is level triggering otherwise edge triggering.

If IT0 = 0, then it is level triggering or else edge triggering.

There is one more SFR related to timer section.

IN0:

IT0 stands for interrupt type for INT0.

Tmod ( timer modes ):

Tmod register

There are two sections which are same , one for timer 1 and other for timer 0. This register is used to set the modes in timers of 8051.

Gate:

Enabling the gate will allow for hardware control ( every application has hardware control, layman cannot operate washing machines by programming the microcontroller ). A normal switch is connected to INT1 ( infact INT0 pin is lost ).

C/T:

It is a C/T bar. Active high C ( counter ) or active low timer. If it is 1, then used as counter or else timer.

M1 and M0:

M1M0Mode
000
011
102
113

These two flags are decided on which mode should the timer work. There are 4 modes in 8051.

M0 ( 13-bit timer/counter ):

Working :

  1. Clock is supplied to Lower byte ( here it is 5 bits only ).
  2. After every 32 ( 25 = 32 ) counts, TL gives increment to TH. In this way TH gets filled, after TH is done, it passes to TF ( overflow flag ).
  3. Then TF sends interrupt to the processor. 

This counter can count upto 8k ( 213 = 8K ).

M1 ( 16-bit counter/timer ):

This is the most preferred counter due to its large counting capability. It’s working is similar to M0.

M2 ( 8-bit counter/timer with reload ):

Other timers stop on overflow but this timer doesn’t. It keeps on reloading until the programmer wants.

Here the same count is stored in TL and TH, on count TL keeps on incrementing and once it reaches FF, it makes TF flag and also sends to TH to push TH value ( initial count ) to TL again, so that count can start again.

M3( 2 8bit timers using T0 ):

This mode converts two 16 bit timers to three timers ( 16bit, 8 bit, 8 bit ). Using TH and TL of timer zero, both are separated.

One of these 8bit timers uses the overflow flag of Timer 0 and another 8 bit timer uses the overflow flag of timer 1. In this process timer 1 loses it’s overflow flag ( this is a big advantage in serial communication ).

Here the TH timer ( one among two 8bit timers of T0 ) is not a timer, it is strictly a timer. All others can be either timer or counter based on user requirements.

Processor of 8051 has a 12Mhz clock, which internally can be accessed by any timer as 1Mhz clock. So in the fourth timer mode, there are 3 timers and we attach two external clocks only( refer pin diagram ) , so one should be strictly timer.

TIMER LOGIC DIAGRAM:

Read related topics:
Pin diagram of 8051
Architecture of 8051

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